More than ever modern electronic systems require semiconductor memories [1]. The rapidly increasing use of artificial intelligence in electronic systems is a major driver to this trend [2]. At the same time, new physical storage mechanisms like ferroelectric polarization, magnetoresistance, phase change, and various resistive switching effects are receiving increasing attention due to the facts that traditional charge-based memory devices are facing serious scaling limits and become harder to integrate into modern high-performance CMOS processes that use high-k metal gate technology as well as non-planar device geometries [1].
Compare to the other mentioned options, ferroelectric polarization has two important unique selling points. First, the switching is field driven and, therefore, the energy required for writing is the lowest of all options that offer nonvolatility. Second, there are three fundamentally different options for the readout. Direct sensing of the switched charge in a ferroelectric capacitor (DRAM like sensing), coupling of the polarization to the gate of a field effect transistor (Flash like sensing) and modulation of the resistance of a tunnel junction (resistive switching like sensing) offering a high flexibility to taylor devices towards the application requirements while still using the same physical mechanism and material system.
Well-known ferroelectric materials like lead zirconium titanate or strontium bismuth tantalate etc. are difficult to integrate into state-of-the-art electronic fabrication processes. About 15 years ago ferroelectricity in hafnium oxide was discovered and first published 12 years ago [3] opening the path towards exploring ferroelectricity in materials having the fluorite structure. With this innovation, all of a sudden, CMOS compatible ferroelectric materials became available. Moreover, the recent discovery of ferroelectricity in AlScN [5] added wurtzite structure ferroelectrics as a further valuable option.
The talk will first explain the different approaches to realize ferroelectric hafnium oxide based materials of high quality as well as a few aspects about AlScN. Based on this the status of integrating such materials into devices utilizing the three different readout mechanisms described above will be introduced and discussed. Finally, applications beyond the pure memory operation will be illustrated. An outlook towards future developments will conclude the talk.
References:
[1] T. Schenk, M. Pešić, S. Slesazeck, U. Schroeder and T. Mikolajick, Memory technology—a primer for material scientists, Rep. Prog. Phys. 83, 086501 (2020)
[2] T. Mikolajick, M. H. Park, L. Begon‐Lours, and S. Slesazeck, From Ferroelectric Material Optimization to Neuromorphic Devices, Adv. Mater. 35, 2206042 (2023)
[3] T.S. Böscke, J. Müller, D. Bräuhaus, U. Schröder, and U. Böttger, Ferroelectricity in hafnium oxide thin films, Appl. Phys. Lett. 99, 102903 (2011)
[4] S. Fichtner, N. Wolff, F. Lofink, L. Kienle and B. Wagner, AlScN: A III-V semiconductor based ferroelectric, Journal of Applied Physics 125, 114103 (2019)
[5] U. Schroeder, M. H. Park, T. Mikolajick, and C. S. Hwang, The fundamentals and applications of ferroelectric HfO2, Nature Reviews Materials volume 7, pages653–669 (2022)
Coming soon...
Memory data transfer is becoming the main limiting factor in the execution of AI loads at the edge. To overcome speed and power limitations, imposed by the classical Von Neumann architecture, new computational paradigms are being proposed as possible alternatives. In-Memory-Computing is one of the emerging approaches widely praised in the scientific community thanks to the absence of data transfer between the memory and the computational units, with computation directly executed in the memory array. In this work we assess the performance and reliability of In-Memory-Computing exploiting embedded PCM for AI applications at the edge. We considered two different approaches: first a digital In-Memory-Computing executed in the SRAM with the ePCM serving as low latency storage for Neural Network weights and a second approach where In-Memory-Computing is executing directly in the ePCM in the analog domain. The two approaches offer complementary benefits, so a final solution merging the two techniques is envisioned as a possible path for future NPU at the edge.
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